Apparatus and method for mitigating loss of signal content

ABSTRACT

Described is an apparatus comprising: a first sampler to oversample a signal, the signal being processed for transmission through a channel having a notch region; a bandpass filter with passband response to filter the oversampled signal in the notch region; and a first modulator to translate the filtered signal to a higher frequency band than a frequency band of the notch region. Described is a method performed by a transmitter, the method comprising: oversampling a signal; and translating, in response to the oversampling, signal content in a notch region of a channel to a frequency band which is higher than a frequency band of the notch region.

BACKGROUND

Sometimes a portion of signal contents transmitted/received at a highinput/output transfer rate over a channel (or bus) between twointegrated circuits are lost. In a frequency response for the channel,the lost signal contents, which are typically transmitted/received atthe higher frequency of the channel frequency response, are identifiedby a region in which the frequency amplitude is about zero or is heavilyattenuated. This region of the frequency response is typically referredto as a “notch” or “notch region”. This notch may also result in intersymbol interference (ISI) in the signal.

BRIEF DESCRIPTION OF THE DRAWINGS

The embodiments of the disclosure will be understood more fully from thedetailed description given below and from the accompanying drawings ofvarious embodiments of the disclosure, which, however, should not betaken to limit the disclosure to the specific embodiments, but are forexplanation and understanding only.

FIG. 1A illustrates a system having a channel exhibiting a notch in itsfrequency response, and apparatus for mitigating the notch effect,according to some embodiments of the disclosure.

FIG. 1B illustrates a system with a solid state drive (SSD) having anapparatus for mitigating a notch effect in a channel between a memorydie and a memory controller, according to some embodiments of thedisclosure.

FIG. 2 illustrates a frequency response of a channel exhibiting a notch.

FIG. 3 illustrates a frequency response of a channel assuming no notch,and decomposition of part of the frequency response to mitigate thenotch effect, according to some embodiments of the disclosure.

FIG. 4 illustrates a frequency response after oversampling of a signalfor transmission and after modulating frequency content in the notchregion to a higher frequency band, according to some embodiments of thedisclosure.

FIG. 5 illustrates an apparatus for mitigating the notch effect at thetransmitter end, according to some embodiments of the disclosure.

FIG. 6A illustrates a filter bank of the apparatus for decomposing partof the frequency response into sub-bands to mitigate the notch effect,according to some embodiments of the disclosure.

FIG. 6B illustrates a waveform showing operation of the filter bank ofthe apparatus, according to some embodiments of the disclosure.

FIG. 7 illustrates a frequency response of the channel at the receiverend, according to some embodiments of the disclosure.

FIG. 8 illustrates a frequency response of the channel at the receiverend, according to some embodiments of the disclosure.

FIG. 9 illustrates an apparatus for mitigating the notch effect at thereceiver end, according to some embodiments of the disclosure.

FIG. 10 illustrates a flowchart of a method for mitigating the notcheffect at the transmitter end, according to some embodiments of thedisclosure.

FIG. 11 illustrates a flowchart of a method for mitigating the notcheffect at the receiver end, according to some embodiments of thedisclosure.

FIG. 12 illustrates a smart device or a computer system or a SoC(System-on-Chip) with apparatus for mitigating the notch effect,according to some embodiments.

DETAILED DESCRIPTION

In some embodiments, signal processing methods are employed to ensurefidelity of a signal transmitted/received at a high input/outputtransfer rate over a channel (or bus) between two integrated circuitsafter loss of a portion of the signal contents represented by a notch (aregion in which the frequency amplitude is about zero or is heavilyattenuated) in the frequency response for the channel. In someembodiments, filter banks are used to ensure that the contents of thesignal (which is oversampled) in a region of the channel notch arerecoverable at the receiver. In some embodiments, pre-processing of thesignal prior to transmitting over the channel is performed to move thesignal contents, which would have been in the notch region, to a higherfrequency band in the frequency response.

In some embodiments, post-processing of the received signal contents isperformed by filtering the higher frequency band content and modulatingit to a lower frequency band (i.e., the frequency band of the notchregion). In some embodiments, the received content (that underwent thechannel notch effect) is then combined with the modulated signal togenerate a recovered signal. In some embodiments, the recovered signalis then down sampled to a frequency of the original signal (i.e., thefrequency before that signal was oversampled at the transmitter end).

In the following description, numerous details are discussed to providea more thorough explanation of embodiments of the present disclosure. Itwill be apparent, however, to one skilled in the art, that embodimentsof the present disclosure may be practiced without these specificdetails. In other instances, well-known structures and devices are shownin block diagram form, rather than in detail, in order to avoidobscuring embodiments of the present disclosure.

Note that in the corresponding drawings of the embodiments, signals arerepresented with lines. Some lines may be thicker, to indicate moreconstituent signal paths, and/or have arrows at one or more ends, toindicate primary information flow direction. Such indications are notintended to be limiting. Rather, the lines are used in connection withone or more exemplary embodiments to facilitate easier understanding ofa circuit or a logical unit. Any represented signal, as dictated bydesign needs or preferences, may actually comprise one or more signalsthat may travel in either direction and may be implemented with anysuitable type of signal scheme.

Throughout the specification, and in the claims, the term “connected”means a direct electrical or wireless connection between the things thatare connected, without any intermediary devices. The term “coupled”means either a direct electrical or wireless connection between thethings that are connected or an indirect connection through one or morepassive or active intermediary devices. The term “circuit” means one ormore passive and/or active components that are arranged to cooperatewith one another to provide a desired function. The term “signal” meansat least one current signal, voltage signal or data/clock signal. Themeaning of “a,” “an,” and “the” include plural references. The meaningof “in” includes “in” and “on.”

The terms “substantially,” “close,” “approximately,” “near,” and“about,” generally refer to being within +/−20% of a target value.Unless otherwise specified the use of the ordinal adjectives “first,”“second,” and “third,” etc., to describe a common object, merelyindicate that different instances of like objects are being referred to,and are not intended to imply that the objects so described must be in agiven sequence, either temporally, spatially, in ranking or in any othermanner.

FIG. 1A illustrates system 100 having a channel exhibiting a notch inits frequency response, and apparatus for mitigating the notch effect,according to some embodiments of the disclosure. Here, system 100includes integrated circuits (ICs) 101 and 102 coupled together viachannel 103. Channel 103 exhibits a notch in frequency domain. The term“notch” here generally refers to a characteristic of a channel having aregion in the frequency domain where signal content is lost. Thefrequency location or region of the notch in the frequency domain for achannel may be known in advance as part of the channel characterization.

In some embodiments, each IC comprises apparatus 101 a and 102 a tomitigate the notch effect, respectively, so that the signal transmittedby a transmitter is recovered at the receiver with full fidelity. If asignal which is critically sampled is transmitted over a channel thathas a frequency response which is not zero at any frequency, then aninverse filtering operation (or an ISI cancellation process) can be usedto recover the signal at the receiver. But if the channel has a notch inthe frequency domain which leads to virtual loss of the transmittedsignal, without something more, that signal cannot be recovered withfull fidelity. In some embodiments, the signal transmitted over thechannel is pre-processed by apparatus 101 a (assuming here, that IC 101is transmitting a signal to IC 102 over channel 103) and thenpost-processed by apparatus 101 b (i.e., the receiver end) so that theeffect of the notch is mitigated.

In some embodiments, apparatus 101 a has logic (e.g., samplers, filters,adders, modulators, etc.) that oversamples a signal (which is to betransmitted) so that a high frequency band is available. In someembodiments, the signal is a critically sampled signal. In someembodiments, the high frequency band is used to carry the signal contentthat would have been otherwise suppressed or lost as represented by thenotch region in the frequency domain in channel 103. In someembodiments, apparatus 101 a comprises a modulator that translates theoversampled signal in the notch region to the newly made availablehigher frequency band. A driver or transmitter then transmits theoversampled signal along with the oversampled signal in the notch region(which is now translated to a higher frequency band) to IC 102 overchannel 103.

Channel 103 introduces a notch in a pre-known notch region of thechannel and so the oversampled signal in the pre-known notch region issuppressed when the receiver receives the oversampled signal via channel103. In some embodiments, the oversampled signal in the notch region,which is translated to the higher frequency band, is also received bythe receiver in IC 102. Since the higher frequency band is away from thefrequency band of the notch region, the signal content translated overto the higher frequency band retains fidelity. In some embodiments,apparatus 102 b post processes the oversampled signal in the notchregion (which is translated to the higher frequency band), and theoversampled signal to reconstruct the signal of original frequency(i.e., the signal which was oversampled at the transmitter end). In someembodiments, apparatus 102 b has similar circuits/logic as apparatus 102a but in reverse order to reconstruct the signal which was pre-processedby apparatus 102 a.

FIG. 1B illustrates system 120 with a Solid State Drive (SSD) having anapparatus for mitigating a notch in a channel between a memory die and amemory controller, according to some embodiments of the disclosure. Itis pointed out that those elements of FIG. 1B having the same referencenumbers (or names) as the elements of any other figure can operate orfunction in any manner similar to that described, but are not limited tosuch.

In some embodiments, system 120 comprises SSD 121 and Processor 122. Insome embodiments, SSD 121 includes an Input/Output (I/O) interface 123,Memory Controller 124, and a plurality of memory dies (i.e., Memory Die1 through Memory Die N, where N is an integer). In some embodiments, I/Ointerface 123 is a Serial Advanced Technology Attachment (SATA)interface and interconnect 126 is a SATA compliant bus coupling SSD 121to Processor 122. In other embodiments, other types of I/O interfacesmay be used for I/O interface 123. For example, Serial Attached SmallComputer System Interface (SCSI) (or simply SAS) may be used for I/Ointerface 123, and interconnect 126 is a SAS compliant interface;Peripheral Component Interconnect Express (PCIe) may also be used forI/O interface 123 as described by PCIe Base 3.0 Specification.

In some embodiments, Processor 122 is a microprocessor (such as thosedesigned by Intel Corporation of Santa Clara, Calif.), Digital SignalProcessors (DSPs), Field-Programmable Gate Arrays (FPGAs), ApplicationSpecific Integrated Circuits (ASICs), or Radio-Frequency IntegratedCircuits (RFICs), etc. So as not to obscure the embodiments, asimplified version of SSD 121 is shown. A person skilled in the artwould appreciate that there are other logic and circuits needed forcomplete operation of SSD 121. For example, encoders, decoders, syndromecalculators, queues, input-output buffers, etc., are not shown.

While the embodiments of FIG. 1B are illustrated with two distinctcomponents in SSD 121 and Processor 122, in some embodiments, SSD 121and Processor 122 can be packaged together as a single unit. In someembodiments, SSD 121 and Processor 122 are implemented using a threedimensional integrated circuit (3D IC) technology where various dies arestacked on each other. For example, various dies or components of SSD121 may be implemented as dies that are stacked on a die of Processor122 to form a stacked die or 3D IC.

Here, memory dies (i.e., Memory Die 1 to Memory Die N, where ‘N’ is aninteger) are shown as a group of memory banks in one area. In someembodiments, the memory dies may be distributed in SSD 121. In someembodiments, each memory die is a non-volatile memory. For example, eachmemory die is one or more of a single or multi-threshold level NANDflash memory, NOR flash memory, single or multi-level Phase ChangeMemory (PCM), a three dimensional cross point memory, a resistivememory, nanowire memory, ferro-electric transistor random access memory(FeTRAM), magnetoresistive random access memory (MRAM) memory thatincorporates memristor technology, or spin transfer torque (STT)-MRAM,or a combination of any of the above, etc.

In some embodiments, Memory Controller 124 includes apparatus 101 b-1through 101 b-N (where, N is an integer) to pre-process the signaltransmitted over channel 125 to memory dies. In some embodiments,channel 125 is an Open NAND Flash Interface (ONFI) specificationcompliant interface (e.g., ONFI-4 (4.0 revision released Apr. 2, 2014)).An ONFI-4 channel supports data transfer at 800 Mega Transfers persecond (MT/s). In other embodiments, other types of interfaces may beused for communicating between Memory Controller 124 and Memory Dies.

In some embodiments, each memory die includes apparatus 101 a-1 through101 a-N to post-process the received signal and to mitigate the notcheffect manifested by channel 125. While the embodiments are describedwith reference to Memory Controller 124 transmitting to Memory Dies 1through N, for example, both transmit and receive logic/circuits areincluded in both Memory Controller 124 and the memory dies. Each ofapparatus 101 a-1 through 101 a-N performs the same function asapparatus 101 a, and each of apparatus 101 b-1 through 101 b-N performsthe same function as apparatus 102 a when Memory Controller 124 is thetransmitting end and Memory Die is the receiving end. The embodimentsare not limited to an SSD, and can be applied to any communicationsystem that uses a channel having a notch.

FIG. 2 illustrates frequency response 200 of a channel (e.g., 103/125)exhibiting a notch effect. It is pointed out that those elements of FIG.2 having the same reference numbers (or names) as the elements of anyother figure can operate or function in any manner similar to thatdescribed, but are not limited to such.

Here, x-axis is normalized frequency, where fs is the sampling frequencyand fmax is the maximum frequency of the channel response. The y-axisdepends on the type of signal. Here, y-axis is assumed to be theamplitude of the signal through channel 103/125. Channel response 201illustrates a notch region 202 where the signal content (at thatfrequency region) is suppressed (i.e., notched) and so the signalcontent is lost in that region. Various embodiments of this disclosuremitigate the suppression of the signal content in notch region 202 byfiltering those contents before sending the signal over channel 103/125and placing those filtered contents on a higher frequency band (i.e.,greater than fmax) so that the filtered content is not suppressed orimpacted by notch region 202.

FIG. 3 illustrates frequency response 300 of channel 103/125 assuming nonotch, and decomposition of part of the channel frequency response tomitigate the notch effect, according to some embodiments of thedisclosure. It is pointed out that those elements of FIG. 3 having thesame reference numbers (or names) as the elements of any other figurecan operate or function in any manner similar to that described, but arenot limited to such.

Here, x-axis is normalized frequency, where fs is the sampling frequencyand fmax is the maximum frequency of the response. The y-axis depends onthe type of signal. Here, y-axis is assumed to be the amplitude of thesignal through channel 103/125. In some embodiments, the frequency bandregion between fs and the region over fmax is decomposed into sub-bands.So as not to obscure the embodiments, four sub-bands 301, 302, 303, and304 are shown.

In some embodiments, sub-band 302 is filtered and translated ormodulated up to sub-band 304. This allows signal content in notch region202 to be protected from channel notch because channel notch cannotsuppress signals outside the notch region 202. Here, ω_(o) is thetranslation in frequency that is given to the sub-band portion in notchregion 202. For example, if center frequency of 5 GHz of the notch ismoved to 7 GHz, then ω_(o) is 2 GHz×2×Pi. In some embodiments, filterbanks are used to decompose the frequency region into sub-bands usingfinite impulse response filter (FIR). In some embodiments, filter banksuse infinite impulse response filters (IIR). In other embodiments, othertypes of filters may be used.

FIG. 4 illustrates frequency response 400 after oversampling of a signalfor transmission and modulating frequency content in notch region 202 toa higher frequency band, according to some embodiments of thedisclosure. It is pointed out that those elements of FIG. 4 having thesame reference numbers (or names) as the elements of any other figurecan operate or function in any manner similar to that described, but arenot limited to such.

In some embodiments, the signal for transmission is oversampled togenerate a “hole” in the frequency domain in a frequency band higherthan fmax. Oversampling is a process of sampling a signal with asampling frequency significantly higher than the Nyquist rate. Onereason for oversampling is that a bandwidth-limited signal can bereconstructed if sampled above the Nyquist rate. The Nyquist rate istwice the highest frequency (i.e., fmax) in the signal. Some technicaleffects of oversampling are that it improves resolution, reduces noise,and assists with avoiding aliasing and phase distortion by relaxinganti-aliasing filter performance requirements.

Here, the “hole” is the frequency region 402. In some embodiments, abandpass filter, or filter bank that generates sub-band 302 overlappingthe notch region 202, is used to filter out the signal which wouldotherwise be in notch region 202 (i.e., the filter bank has a passbandresponse at the channel notch). This filtered signal content is signalcontent 401 which is translated or modulated to the frequency band ofhole 402, according to some embodiments. In some embodiments, theoversampled signal and the filtered signal translated to region 402(which has a frequency band higher than the frequency band of notchregion 202) is then combined together and transmitted together overchannel 103/125 to a receiver which then reconstructs the originalsignal.

FIG. 5 illustrates apparatus 500 for mitigating the notch effect at thetransmitter end, according to some embodiments of the disclosure. It ispointed out that those elements of FIG. 5 having the same referencenumbers (or names) as the elements of any other figure can operate orfunction in any manner similar to that described, but are not limited tosuch.

In some embodiments, apparatus 500 comprises Oversampling Logic 501,bandpass filter 502 (with pass band response Aj), modulator 503, andadder/combiner or integrator 504. In some embodiments, input signalsamples x(n) are received by Oversampling Logic 501 that oversamplesx(n) to a higher frequency (f_(h)) to generate oversampled signalsamples x′(n). The process of oversampling by Oversampling Logic 501generates a frequency hole (i.e., region 402) above fmax. In someembodiments, bandpass filter 502 filters the signal content in notchregion 202. Here, bandpass filter 502 has a passband response thatpasses the signal content in notch region 202 and blocks all otherfrequency content.

In some embodiments, output of bandpass filter 502 (i.e., the signalcontent in notch region 202) is translated up or modulated to a higherfrequency band (i.e., frequency band 402) by multiplying the filteredsignal content with Cosine (ω_(o)n), where ω_(o) is the translation infrequency that is given to the sub-band portion in notch region 202. Insome embodiments, the modulated signal (i.e., the output of modulator503) is then added/combined or integrated with the oversampled signalx′(n) which is then sent to channel 103/125.

In some embodiments, apparatus 500 also includes subtraction logic 505which subtracts the filtered content from notch region 202. The filteredcontent is subtracted from notch region 202 because it is duplicated inthe high frequency region. Even though the filtered content is distortedby the notch in the channel upon transmission of the signal through thechannel, and in some embodiments the filtered content may not besubtracted out, sending two copies of the same data (i.e., the filtereddata) may not be ideal in terms of power performance. Samples y(n) arethen received by receiver 102 a (e.g., one of apparatus 101 a-1) whichreconstructs the original signal.

FIG. 6A illustrates filter bank 600 of the apparatus for decomposingpart of the frequency response into sub-bands to mitigate the notcheffect, according to some embodiments of the disclosure. It is pointedout that those elements of FIG. 6A having the same reference numbers (ornames) as the elements of any other figure can operate or function inany manner similar to that described, but are not limited to such.

Filter bank 600 comprises an array of bandpass filters H_(x)(z), where‘x’ ranges from 1 to M−1 (i.e., 601-1 to 601-(M−1)) that separates theinput signal x′(s) into multiple components (i.e., sub-bands), each onecarrying a single frequency sub-band of the original signal. Here,H_(x)(z) is the transfer function of filter ‘x’ and ‘M’ is an integer.The process of decomposition is performed by 601-1 to 601-(M−1), whichare collectively also called analysis (i.e., analysis of the signal interms of its components in each sub-band). The output of analysis (i.e.,output of 601-1 to 601-(M−1) is referred to as a sub-band signal with asmany sub-bands as there are filters in the filter bank. In someembodiments, filter bank 600 performs sub-band decomposition of theoversampled signal x′(n) using FIR or IIR filters.

In some embodiments, filter back 600 comprises bandpass filtersF_(x)(z), where ‘x’ ranges from 0 to (M−1) (i.e., 604-1 to 604-(M−1)).In some embodiments, bandpass filters are tuned to have a passbandresponse in notch region 202. In some embodiments, additional upsamplers (not shown) and down samplers (not shown) are added betweenfilters H_(x)(z) and F_(z)(z).

Here, filter bank 600 is an M-channel uniform filter bank. In thisexample, M=4. In some embodiments, oversampled signal x′(n) isdecomposed into four uniform frequency bands (or sub-bands). Thoughthere may be aliasing at the output of the decimators as shown bywaveform 600 of FIG. 6B, the reconstruction filters at the receiverensure that the aliasing in the reconstructed signal is cancelled,according to some embodiments.

FIG. 7 illustrates frequency response 700 of channel 103/125 at thereceiver end showing the oversampled signal and the modulated frequencycontent transmitted by the transmitter, according to some embodiments ofthe disclosure. It is pointed out that those elements of FIG. 7 havingthe same reference numbers (or names) as the elements of any otherfigure can operate or function in any manner similar to that described,but are not limited to such.

Here, receiver 101 b receives the oversampled signal and the filteredsignal 401 which was modulated to region 402. In some embodiments,receiver 101 b implements a filter bank that reconstructs sub-bands 701,702, 703, and 703 (corresponding to sub-bands 301, 302, 303, and 304)and translates the high frequency band 402 (i.e., 702) back to its lowerfrequency in notch region 202. In some embodiments, the lower frequencysignal content is combined with the oversampled signal to generate acombined signal using a reconstruction filter bank.

FIG. 8 illustrates frequency response 800 of channel 103/125 at thereceiver end showing modulation of frequency content (in the higherfrequency band) to the notch region at a lower frequency band, accordingto some embodiments of the disclosure. It is pointed out that thoseelements of FIG. 8 having the same reference numbers (or names) as theelements of any other figure can operate or function in any mannersimilar to that described, but are not limited to such.

FIG. 8 is like FIG. 4 except that it is from the point of view of thereceiver. In some embodiments, the higher frequency band content 401 infrequency band 402, which would otherwise be in notch region 202, isfiltered using a bandpass filter or a filter bank and then translateddown or modulated to a lower frequency band which is the frequency bandof the notch.

FIG. 9 illustrates apparatus 900 for mitigating the notch effect at thereceiver end, according to some embodiments of the disclosure. It ispointed out that those elements of FIG. 9 having the same referencenumbers (or names) as the elements of any other figure can operate orfunction in any manner similar to that described, but are not limited tosuch.

In some embodiments, apparatus 900 comprises bandpass filter 901,modulator 902, adder/combiner or integrator 903, subtraction logic 904,and Down sampling Logic 905. In some embodiments, receiver 101 breceives input samples y(n) which includes the oversampled signalsamples as well as the signal content 401 in higher frequency band 402.In some embodiments, bandpass filter 901 has a passband response (Aj)such that it filters the high frequency band region 402 as y′(n).

In some embodiments, the filtered signal samples y′(n) are thenmodulated down by modulator 902 by multiplying y′(n) with Cosine(−ω_(o)n) so that the filtered signal content is translated in frequencydomain from frequency band 402 to frequency band 202. In someembodiments, the modulated signal (i.e., output of modulator 902) isthen combined with the input signal y(n) (i.e., the oversampled signaland the high frequency content signal 401). In some embodiments, thehigh frequency signal content 401 is then removed or subtracted out fromthe resultant signal (i.e., from the output of combiner 903) toreconstruct the signal content that was originally oversampled at thetransmitter end (e.g., 101 a). In some embodiments, Down sampling Logic905 down samples the reconstructed signal content back to its originalfrequency (i.e., f_(L)) to generate an output signal x(n). This outputsignal x(n) retains its fidelity despite channel 103/125 having a notch.

FIG. 10 illustrates flowchart 1000 of a method for mitigating the notcheffect at the transmitter end, according to some embodiments of thedisclosure. It is pointed out that those elements of FIG. 10 having thesame reference numbers (or names) as the elements of any other figurecan operate or function in any manner similar to that described, but arenot limited to such.

Although the blocks in the flowchart with reference to FIG. 10 are shownin a particular order, the order of the actions can be modified. Thus,the illustrated embodiments can be performed in a different order, andsome actions/blocks may be performed in parallel. Some of the blocksand/or operations listed in FIG. 10 are optional in accordance withcertain embodiments. The numbering of the blocks presented is for thesake of clarity and is not intended to prescribe an order of operationsin which the various blocks must occur. Additionally, operations fromthe various flows may be utilized in a variety of combinations.

At block 1001, a signal for transmission is oversampled by OversamplingLogic 501. This process generates a “hole” at a frequency band higherthan the maximum frequency of the channel response. This hole (which isa frequency band) is then used to carry the signal content that wouldotherwise be lost in the channel notch. At block 1002, bandpass filter502 filters the signal content in notch region 202 to preserve thatsignal before it is lost in the channel notch. At block 1003, modulator503 translates the filtered signal content 401 to a higher frequencyband 402 (which is a “hole” region above fmax). The filtered signalcontent 401 is then combined with the oversampled signal. At block 1004,the combined signal (i.e., the filtered signal 401 and the oversampledsignal) are transmitted by a driver over channel 103/125 to a receiver.

FIG. 11 illustrates flowchart 1100 of a method for mitigating the notcheffect at the receiver end, according to some embodiments of thedisclosure. It is pointed out that those elements of FIG. 11 having thesame reference numbers (or names) as the elements of any other figurecan operate or function in any manner similar to that described, but arenot limited to such.

Although the blocks in the flowchart with reference to FIG. 11 are shownin a particular order, the order of the actions can be modified. Thus,the illustrated embodiments can be performed in a different order, andsome actions/blocks may be performed in parallel. Some of the blocksand/or operations listed in FIG. 11 are optional in accordance withcertain embodiments. The numbering of the blocks presented is for thesake of clarity and is not intended to prescribe an order of operationsin which the various blocks must occur. Additionally, operations fromthe various flows may be utilized in a variety of combinations.

At block 1101, signal content in the higher frequency band 402 isfiltered by bandpass filter 901. The passband response of filter 901 isdifferent than the passband response of filter 501. For example,passband response of filter 901 filters a higher frequency content(i.e., region 402) than the passband response of filter 501 (whichfilters notch region 202). At block 1102, the filtered signal content inregion 402 is translated down by modulator 702 to a lower frequency band202 (which is the frequency region of the notch).

At block 1103, adder 902 combines the filtered content, now translatedto a lower frequency band, with the oversampled signal received byreceiver 101 b. At block 1104, the high frequency signal content 401 isfiltered out (i.e., subtracted from the overall signal) to reconstructthe original signal that was oversampled at transmitter 101 a. At block1105, the combined signal (minus the high frequency signal content) isdown sampled to a lower frequency (i.e., the original frequency of thesignal before it was oversampled at the transmitting end) by Downsampling Logic 704 to generate the recovered signal.

FIG. 12 illustrates a smart device or a computer system or a SoC(System-on-Chip) with apparatus for mitigating the notch effect,according to some embodiments. FIG. 12 illustrates a block diagram of anembodiment of a mobile device in which flat surface interface connectorscould be used. In some embodiments, computing device 1600 represents amobile computing device, such as a computing tablet, a mobile phone orsmart-phone, a wireless-enabled e-reader, or other wireless mobiledevice. It will be understood that certain components are showngenerally, and not all components of such a device are shown incomputing device 1600.

In some embodiments, computing device 1600 includes a first processor1610 with apparatus for mitigating the notch effect, according to someembodiments discussed. Other blocks of the computing device 1600 mayalso include an apparatus for mitigating the notch effect according tosome embodiments. The various embodiments of the present disclosure mayalso comprise a network interface within 1670 such as a wirelessinterface so that a system embodiment may be incorporated into awireless device, for example, cell phone or personal digital assistant.

In some embodiments, processor 1610 (and/or processor 1690) can includeone or more physical devices, such as microprocessors, applicationprocessors, microcontrollers, programmable logic devices, or otherprocessing means. The processing operations performed by processor 1610include the execution of an operating platform or operating system onwhich applications and/or device functions are executed. The processingoperations include operations related to I/O (input/output) with a humanuser or with other devices, operations related to power management,and/or operations related to connecting the computing device 1600 toanother device. The processing operations may also include operationsrelated to audio I/O and/or display I/O.

In some embodiments, computing device 1600 includes audio subsystem1620, which represents hardware (e.g., audio hardware and audiocircuits) and software (e.g., drivers, codecs) components associatedwith providing audio functions to the computing device. Audio functionscan include speaker and/or headphone output, as well as microphoneinput. Devices for such functions can be integrated into computingdevice 1600, or connected to the computing device 1600. In oneembodiment, a user interacts with the computing device 1600 by providingaudio commands that are received and processed by processor 1610.

In some embodiments, computing device 1600 comprises display subsystem1630. Display subsystem 1630 represents hardware (e.g., display devices)and software (e.g., drivers) components that provide a visual and/ortactile display for a user to interact with the computing device 1600.Display subsystem 1630 includes display interface 1632, which includesthe particular screen or hardware device used to provide a display to auser. In one embodiment, display interface 1632 includes logic separatefrom processor 1610 to perform at least some processing related to thedisplay. In one embodiment, display subsystem 1630 includes a touchscreen (or touch pad) device that provides both output and input to auser.

In some embodiments, computing device 1600 comprises I/O controller1640. I/O controller 1640 represents hardware devices and softwarecomponents related to interaction with a user. I/O controller 1640 isoperable to manage hardware that is part of audio subsystem 1620 and/ordisplay subsystem 1630. Additionally, I/O controller 1640 illustrates aconnection point for additional devices that connect to computing device1600 through which a user might interact with the system. For example,devices that can be attached to the computing device 1600 might includemicrophone devices, speaker or stereo systems, video systems or otherdisplay devices, keyboard or keypad devices, or other I/O devices foruse with specific applications such as card readers or other devices.

As mentioned above, I/O controller 1640 can interact with audiosubsystem 1620 and/or display subsystem 1630. For example, input througha microphone or other audio device can provide input or commands for oneor more applications or functions of the computing device 1600.Additionally, audio output can be provided instead of, or in addition todisplay output. In another example, if display subsystem 1630 includes atouch screen, the display device also acts as an input device, which canbe at least partially managed by I/O controller 1640. There can also beadditional buttons or switches on the computing device 1600 to provideI/O functions managed by I/O controller 1640.

In some embodiments, I/O controller 1640 manages devices such asaccelerometers, cameras, light sensors or other environmental sensors,or other hardware that can be included in the computing device 1600. Theinput can be part of direct user interaction, as well as providingenvironmental input to the system to influence its operations (such asfiltering for noise, adjusting displays for brightness detection,applying a flash for a camera, or other features).

In some embodiments, computing device 1600 includes power management1650 that manages battery power usage, charging of the battery, andfeatures related to power saving operation. Memory subsystem 1660includes memory devices for storing information in computing device1600. Memory can include nonvolatile (state does not change if power tothe memory device is interrupted) and/or volatile (state isindeterminate if power to the memory device is interrupted) memorydevices. Memory subsystem 1660 can store application data, user data,music, photos, documents, or other data, as well as system data (whetherlong-term or temporary) related to the execution of the applications andfunctions of the computing device 1600.

Elements of embodiments are also provided as a machine-readable medium(e.g., memory 1660) for storing the computer-executable instructions(e.g., instructions to implement any other processes discussed herein).The machine-readable medium (e.g., memory 1660) may include, but is notlimited to, flash memory, optical disks, CD-ROMs, DVD ROMs, RAMs,EPROMs, EEPROMs, magnetic or optical cards, phase change memory (PCM),or other types of machine-readable media suitable for storing electronicor computer-executable instructions. For example, embodiments of thedisclosure may be downloaded as a computer program (e.g., BIOS) whichmay be transferred from a remote computer (e.g., a server) to arequesting computer (e.g., a client) by way of data signals via acommunication link (e.g., a modem or network connection).

In some embodiments, computing device 1600 comprises connectivity 1670.Connectivity 1670 includes hardware devices (e.g., wireless and/or wiredconnectors and communication hardware) and software components (e.g.,drivers, protocol stacks) to enable the computing device 1600 tocommunicate with external devices. The computing device 1600 could beseparate devices, such as other computing devices, wireless accesspoints or base stations, as well as peripherals such as headsets,printers, or other devices.

Connectivity 1670 can include multiple different types of connectivity.To generalize, the computing device 1600 is illustrated with cellularconnectivity 1672 and wireless connectivity 1674. Cellular connectivity1672 refers generally to cellular network connectivity provided bywireless carriers, such as provided via GSM (global system for mobilecommunications) or variations or derivatives, CDMA (code divisionmultiple access) or variations or derivatives, TDM (time divisionmultiplexing) or variations or derivatives, or other cellular servicestandards. Wireless connectivity (or wireless interface) 1674 refers towireless connectivity that is not cellular, and can include personalarea networks (such as Bluetooth, Near Field, etc.), local area networks(such as Wi-Fi), and/or wide area networks (such as WiMax), or otherwireless communication.

In some embodiments, computing device 1600 comprises peripheralconnections 1680. Peripheral connections 1680 include hardwareinterfaces and connectors, as well as software components (e.g.,drivers, protocol stacks) to make peripheral connections. It will beunderstood that the computing device 1600 could both be a peripheraldevice (“to” 1682) to other computing devices, as well as haveperipheral devices (“from” 1684) connected to it. The computing device1600 commonly has a “docking” connector to connect to other computingdevices for purposes such as managing (e.g., downloading and/oruploading, changing, synchronizing) content on computing device 1600.Additionally, a docking connector can allow computing device 1600 toconnect to certain peripherals that allow the computing device 1600 tocontrol content output, for example, to audiovisual or other systems.

In addition to a proprietary docking connector or other proprietaryconnection hardware, the computing device 1600 can make peripheralconnections 1680 via common or standards-based connectors. Common typescan include a Universal Serial Bus (USB) connector (which can includeany of a number of different hardware interfaces), DisplayPort includingMiniDisplayPort (MDP), High Definition Multimedia Interface (HDMI),Firewire, or other types.

Reference in the specification to “an embodiment,” “one embodiment,”“some embodiments,” or “other embodiments” means that a particularfeature, structure, or characteristic described in connection with theembodiments is included in at least some embodiments, but notnecessarily all embodiments. The various appearances of “an embodiment,”“one embodiment,” or “some embodiments” are not necessarily allreferring to the same embodiments. If the specification states acomponent, feature, structure, or characteristic “may,” “might,” or“could” be included, that particular component, feature, structure, orcharacteristic is not required to be included. If the specification orclaim refers to “a” or “an” element, that does not mean there is onlyone of the elements. If the specification or claims refer to “anadditional” element, that does not preclude there being more than one ofthe additional element.

Furthermore, the particular features, structures, functions, orcharacteristics may be combined in any suitable manner in one or moreembodiments. For example, a first embodiment may be combined with asecond embodiment anywhere the particular features, structures,functions, or characteristics associated with the two embodiments arenot mutually exclusive.

While the disclosure has been described in conjunction with specificembodiments thereof, many alternatives, modifications and variations ofsuch embodiments will be apparent to those of ordinary skill in the artin light of the foregoing description. For example, other memoryarchitectures e.g., Dynamic RAM (DRAM) may use the embodimentsdiscussed. The embodiments of the disclosure are intended to embrace allsuch alternatives, modifications, and variations as to fall within thebroad scope of the appended claims.

In addition, well known power/ground connections to integrated circuit(IC) chips and other components may or may not be shown within thepresented figures, for simplicity of illustration and discussion, and soas not to obscure the disclosure. Further, arrangements may be shown inblock diagram form in order to avoid obscuring the disclosure, and alsoin view of the fact that specifics with respect to implementation ofsuch block diagram arrangements are highly dependent upon the platformwithin which the present disclosure is to be implemented (i.e., suchspecifics should be well within purview of one skilled in the art).Where specific details (e.g., circuits) are set forth in order todescribe example embodiments of the disclosure, it should be apparent toone skilled in the art that the disclosure can be practiced without, orwith variation of, these specific details. The description is thus to beregarded as illustrative instead of limiting.

The following examples pertain to further embodiments. Specifics in theexamples may be used anywhere in one or more embodiments. All optionalfeatures of the apparatus described herein may also be implemented withrespect to a method or process.

For example, an apparatus is provided which comprises: a first samplerto oversample a signal, the signal being processed for transmissionthrough a channel having a notch region; a bandpass filter with passbandresponse to filter the oversampled signal in the notch region; and afirst modulator to translate the filtered signal to a higher frequencyband than a frequency band of the notch region. In some embodiments, thebandpass filter is implemented as a filter bank. In some embodiments,the filter bank decomposes the oversampled signal into multiple sub-bandsections, and wherein the filtered signal is one of the decomposedsignals in one of the sub-band sections. In some embodiments, theapparatus comprises a transmitter to transmit the translated filteredsignal and the oversampled signal through the channel to a receiver,wherein the channel has a notch associated with the notch region.

In some embodiments, the receiver comprises a second modulator tomodulate the translated filtered signal, received by the receiver, to alower frequency band, wherein the lower frequency band is the frequencyband of the notch region. In some embodiments, the receiver comprises areconstruction filter bank to combine the modulated filtered signal,generated by the second modulator, with the received oversampled signalwhich suffered notch degradation. In some embodiments, the receivercomprises a down sampler to restore the oversampled signal to afrequency of the signal sampled by the first sampler.

In another example, a method is provided which is performed by atransmitter. The method comprises: oversampling a signal; andtranslating, in response to the oversampling, signal content in a notchregion of a channel to a frequency band which is higher than a frequencyband of the notch region. In some embodiments, the method comprises:transmitting the oversampled signal and the translated signal contentover the channel to a receiver. In some embodiments, the receiver is tomodulate the translated signal content from the higher frequency band toa lower frequency band corresponding to the frequency band of the notchregion. In some embodiments, the receiver combines the translated signalcontent, which is modulated to the lower frequency band, with thereceived oversampled signal which suffered notch degradation.

In another example, a system is provided which comprises: a channelhaving a notch region; a first Integrated Circuit (IC); and a second ICcoupled to the first IC via the channel, the second IC including atransmitter which comprises: a first sampler to oversample a signal, thesignal being processed for transmission through the channel; a bandpassfilter with passband response to filter the oversampled signal in thenotch region of the channel; a first modulator to translate the filteredsignal to a higher frequency band than a frequency band of the notchregion; and a driver to transmit the translated filtered signal and theoversampled signal to the first IC.

In some embodiments, the system comprises an I/O interface forcommunicating with another processor. In some embodiments, the I/Ointerface is a SATA interface. In some embodiments, the first IC is amemory controller and the second IC is a non-volatile memory. In someembodiments, the non-volatile memory is at least one of: NAND flashmemory, NOR flash memory, a PCM, a three dimensional cross point memory,a resistive memory, nanowire memory, a FeTRAM, a MRAM memory thatincorporates memristor technology, or a STT-MRAM.

In some embodiments, the first IC is a non-volatile memory and thesecond IC is a memory controller. In some embodiments, the non-volatilememory is at least one of: NAND flash memory, NOR flash memory, a PCM, athree dimensional cross point memory, a resistive memory, nanowirememory, a FeTRAM, a MRAM memory that incorporates memristor technology,or a STT-MRAM. In some embodiments, the channel is an ONFI compliantchannel. In some embodiments, the system comprises a wireless interfacefor allowing the first or second IC to wirelessly communicate withanother device.

In another example, an apparatus is provided which comprises means foroversampling a signal; and means for translating, in response tooversampling, signal content in a notch region of a channel to afrequency band which is higher than a frequency band of the notchregion. In some embodiments, the apparatus comprises: means fortransmitting the oversampled signal and the translated signal contentover the channel to a receiver. In some embodiments, the receiver is tomodulate the translated signal content from the higher frequency band toa lower frequency band corresponding to the frequency band of the notchregion. In some embodiments, the receiver to combine the translatedsignal content, which is modulated to the lower frequency band, with thereceived oversampled signal which suffered notch degradation.

In another example, an apparatus is provided which comprise a receiverto receive, an oversampled signal, over a channel having a notch region;a bandpass filter with passband response to filter the oversampledsignal in the notch region; and a modulator to translate the filteredsignal to a lower frequency band than a frequency band of theoversampled signal. In some embodiments, the bandpass filter isimplemented as a filter bank. In some embodiments, the filter bank toreconstruct a signal from multiple sub-band sections, and wherein thefiltered signal is one of the reconstructed signals in one of thesub-band sections. In some embodiments, the receiver is to modulate thetranslated signal content from the higher frequency band to the lowerfrequency band corresponding to a frequency band of the notch region.

In some embodiments, the receiver combines the translated signalcontent, which is modulated to the lower frequency band, with thereceived oversampled signal which suffered notch degradation. In someembodiments, the receiver comprises a down sampler to restore theoversampled signal to a frequency of a signal sampled by a sampler of atransmitter.

In another example, a system is provided which comprises: a channelhaving a notch region; a first IC; and a second IC coupled to the firstIC via the channel, the first IC including a receiver which comprisesand apparatus according to the apparatus described above. In someembodiments, the system comprises an I/O interface for communicatingwith another processor. In some embodiments, the non-volatile memory isat least one of: NAND flash memory, NOR flash memory, a PCM, a threedimensional cross point memory, a resistive memory, nanowire memory, aFeTRAM, a MRAM memory that incorporates memristor technology, or aSTT-MRAM.

In some embodiments, the first IC is a non-volatile memory and thesecond IC is a memory controller. In some embodiments, the non-volatilememory is at least one of: NAND flash memory, NOR flash memory, a PCM, athree dimensional cross point memory, a resistive memory, nanowirememory, a FeTRAM, a MRAM memory that incorporates memristor technology,or a STT-MRAM. In some embodiments, the channel is an ONFI compliantchannel. In some embodiments, the system comprises a wireless interfacefor allowing the first or second IC to wirelessly communicate withanother device.

An abstract is provided that will allow the reader to ascertain thenature and gist of the technical disclosure. The abstract is submittedwith the understanding that it will not be used to limit the scope ormeaning of the claims. The following claims are hereby incorporated intothe detailed description, with each claim standing on its own as aseparate embodiment.

I claim:
 1. An apparatus comprising: a first sampler to oversample asignal, the signal to be processed for transmission through a channelhaving a notch region; a bandpass filter, with passband response, tofilter the oversampled signal in the notch region; and a first modulatorto translate the filtered signal to a higher frequency band than afrequency band of the notch region.
 2. The apparatus of claim 1, whereinthe bandpass filter is implemented as a filter bank.
 3. The apparatus ofclaim 2, wherein the filter bank is to decompose the oversampled signalinto multiple sub-band sections, and wherein the filtered signal is oneof the decomposed signals in one of the sub-band sections.
 4. Theapparatus of claim 1 comprises a transmitter to transmit the translatedfiltered signal and the oversampled signal through the channel to areceiver, wherein the channel has a notch associated with the notchregion.
 5. The apparatus of claim 4, wherein the receiver comprises asecond modulator to modulate the translated filtered signal, received bythe receiver, to a lower frequency band, wherein the lower frequencyband is the frequency band of the notch region.
 6. The apparatus ofclaim 5, wherein the receiver comprises a reconstruction filter bank tocombine the modulated filtered signal, generated by the secondmodulator, with the received oversampled signal which suffered notchdegradation.
 7. The apparatus of claim 6, wherein the receiver comprisesa down sampler to restore the oversampled signal to a frequency of thesignal sampled by the first sampler.
 8. A method performed by atransmitter, the method comprising: oversampling a signal; andtranslating, in response to the oversampling, at least a portion of theoversampled signal content in a notch region of a wired channel to afrequency band which is higher than a frequency band of the notchregion.
 9. The method of claim 8 comprising: transmitting theoversampled signal and the translated signal content over the wiredchannel to a receiver.
 10. The method of claim 9, wherein the receiveris to modulate the translated signal content from the higher frequencyband to a lower frequency band corresponding to the frequency band ofthe notch region.
 11. The method of claim 10, wherein the receiver is tocombine the translated signal content, which is modulated to the lowerfrequency band, with the received oversampled signal which sufferednotch degradation.
 12. A system comprising: a channel having a notchregion; a first Integrated Circuit (IC); and a second IC coupled to thefirst IC via the channel, the second IC including a transmitter whichcomprises: a first sampler to oversample a signal, the signal to beprocessed for transmission through the channel; a bandpass filter, withpassband response, to filter the oversampled signal in the notch regionof the channel; a first modulator to translate the filtered signal to ahigher frequency band than a frequency band of the notch region; and adriver to transmit the translated filtered signal and the oversampledsignal to the first IC.
 13. The system of claim 12 comprises an I/Ointerface which is to allow communication with another processor. 14.The system of claim 13, wherein the I/O interface is a Serial AdvancedTechnology Attachment (SATA) interface.
 15. The system of claim 12,wherein the first IC is a memory controller and the second IC is anon-volatile memory.
 16. The system of claim 15, wherein thenon-volatile memory is at least one of: NAND flash memory, NOR flashmemory, a Phase Change Memory (PCM), a three dimensional cross pointmemory, a resistive memory, nanowire memory, a ferro-electric transistorrandom access memory (FeTRAM), a magnetoresistive random access memory(MRAM) memory that incorporates memristor technology, or a spin transfertorque (STT)-MRAM.
 17. The system of claim 12, wherein the first IC is anon-volatile memory and the second IC is a memory controller.
 18. Thesystem of claim 17, wherein the non-volatile memory is at least one of:a NAND flash memory, a NOR flash memory, a Phase Change Memory (PCM), athree dimensional cross point memory, a resistive memory, nanowirememory, a ferro-electric transistor random access memory (FeTRAM), amagnetoresistive random access memory (MRAM) memory that incorporatesmemristor technology, or a spin transfer torque (STT)-MRAM.
 19. Thesystem of claim 12, wherein the channel is an Open NAND Flash Interface(ONFI) compliant channel.
 20. The system of claim 12 comprises awireless interface which is to allow the first or second IC towirelessly communicate with another device.
 21. An apparatus comprising:a filter to receive a signal on a first frequency band over a channelhaving a notch region, and to provide a filtered signal; and a modulatorcoupled to the filter, the modulator is to modulate the filtered signalto a second frequency band, where the second frequency band is lower infrequency than the first frequency band, and where the second frequencyband is a frequency band of the notch region of the channel.
 22. Theapparatus of claim 21 comprises a reconstruction filter bank to combinethe modulated filtered signal with the received signal, thereconstruction filter bank to generate a reconstructed signal.
 23. Theapparatus of claim 22 comprises a down sampler to down sample thereconstructed signal to restore the received signal to a frequency of asignal sampled by a sampler of a transmitter.
 24. The apparatus of claim21, wherein the filter has a passband response.